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Zarlink expands its line of digital timing chips for networking equipment

Zarlink Semiconductor, a manufacturer of timing devices for T1/E1 or PDH (plesiochronous digital hierarchy) network...


October 29, 2004  


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Zarlink Semiconductor, a manufacturer of timing devices for T1/E1 or PDH (plesiochronous digital hierarchy) networking, has introduced the ZLO30109 device, a new DPLL (digital phase locked loop) that delivers added flexibility and carrier-class performance for broadband equipment.

The Ottawa company offers PDH timing chips for worldwide network applications ranging from line card clock generation and multiplication to timing control in central office equipment.

The ZL30109 chip is a monolithic silicon device for access networking equipment that includes DSLAMs (digital subscriber line access multiplexers), VoIP gateways, and IP-PBXs.